? semiconductor components industries, llc, 2015 april, 2017 ? rev. 0 1 publication order number: ESD7331/d ESD7331 esd protection diode micro?packaged diodes for esd protection the ESD7331 is designed to protect voltage sensitive components that require low capacitance from esd and transient voltage events. excellent clamping capability, low capacitance, low leakage, and fast response time, make these parts ideal for esd protection on designs where board space is at a premium. because of its low capacitance, the part is well suited for use in high frequency designs such as usb 2.0 high speed applications. features ? low capacitance 0.4 pf (typ) ? low clamping voltage ? small body outline dimensions: 0.60 mm x 0.30 mm ? low body height: 0.3 mm ? stand?off v oltage: 3.3 v ? iec61000?4?2 level 4 esd protection ? these devices are pb?free, halogen free/bfr free and are rohs compliant typical applications ? usb 2.0/3.0 ? mhl 2.0 ? esata maximum ratings rating symbol value unit iec 61000?4?2 (esd) contact air 15 15 kv total power dissipation on fr?5 board (note 1) @ t a = 25 c thermal resistance, junction?to?ambient p d r ja 250 400 mw c/w junction and storage temperature range t j , t stg ?55 to +150 c lead solder temperature ? maximum (10 second duration) t l 260 c stresses exceeding those listed in the maximum ratings table may damage the device. if any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. fr?5 = 1.0 x 0.75 x 0.62 in. see application note and8308/d for further description of survivability specs. device package shipping ? ordering information www. onsemi.com ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our t ape and reel packaging specification s brochure, brd8011/d. ESD7331mut5g x3dfn2 (pb?free) 15000 / tape & reel x3dfn2 case 152af marking diagram pin 1 6 = specific device code (rotated 180 ) m = date code 1 cathode 2 anode 6 m
bi?directional tvs i pp i pp v i i r i t i t i r v rwm v c v br v rwm v c v br ESD7331 www. onsemi.com 2 electrical characteristics (t a = 25 c unless otherwise noted) symbol parameter i pp maximum reverse peak pulse current v c clamping voltage @ i pp v rwm working peak reverse voltage i r maximum reverse leakage current @ v rwm v br breakdown voltage @ i t i t test current *see application note and8308/d for detailed explanations of datasheet parameters. electrical characteristics (t a = 25 c unless otherwise specified) parameter symbol conditions min typ max unit reverse working voltage v rwm 3.3 v breakdown voltage (note 2) v br i t = 1 ma 4.0 v reverse leakage current i r v rwm = 3.3 v 1.0 a clamping voltage (note 3) v c i pp = 1 a 7.5 v esd clamping voltage v c per iec61000?4?2 see figures 1 and 2 junction capacitance c j v r = 0 v, f = 1 mhz 0.4 0.75 pf dynamic resistance r dyn tlp pulse 0.26 insertion loss f = 100 mhz f = 8.5 ghz 0.003 1.79 db product parametric performance is indicated in the electrical characteristics for the listed test conditions, unless otherwise noted. product performance may not be indicated by the electrical characteristics if operated under different conditions. 2. breakdown voltage is tested from pin 1 to 2 and pin 2 to 1. 3. non?repetitive current pulse at t a = 25 c, per iec61000?4?5 waveform. figure 1. esd clamping voltage positive 8 kv contact per iec61000?4?2 figure 2. esd clamping voltage negative 8 kv contact per iec61000?4?2 voltage (v) time (ns) ?20 0 20 40 60 80 100 120 140 160 ?20 0 20 40 60 80 100 120 140 voltage (v) time (ns) ?70 ?60 ?50 ?40 ?30 ?20 ?10 0 10 ?20 0 20 40 60 80 100 120 140
ESD7331 www. onsemi.com 3 figure 3. reverse leakage current figure 4. line capacitance, f = 1 mhz i r (a) v r (v) c (pf) vbias (v) 1.e?11 1.e?10 1.e?09 1.e?08 1.e?07 1.e?06 1.e?05 1.e?04 1.e?03 1.e?12 ?10 ?6 ?4 ?2 0 2 4 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 ?2.5 ?2 ?1.5 ?1 ?0.5 0 0.5 1 1.5 figure 5. rf insertion loss figure 6. capacitance over frequency capacitance (pf) frequency (hz) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.e+00 2.e+09 4.e+09 6.e+09 8.e+09 1.e+1 0 610 22. 5 s21 (db) frequency (hz) ?10 ?9 ?8 ?7 ?6 ?5 ?4 ?3 ?2 ?1 1.e+07 1.e+08 1.e+09 1.e+10 0 1 figure 7. positive tlp i?v curve i tlp (a) v ctlp (v) 0 2 4 6 8 10 12 14 16 18 22 048121620 figure 8. negative tlp i?v curve ?8 8 0.7 0.8 0.9 1.0 2 6 10 14 18 20 i tlp (a) v ctlp (v) 0 ?2 ?4 ?6 ?8 ?10 ?12 ?14 ?16 ?18 ?22 0 ?4 ?8 ?12 ?16 ?2 0 ?2 ?6 ?10 ?14 ?18 ?20
ESD7331 www. onsemi.com 4 iec 61000?4?2 spec. level test volt- age (kv) first peak current (a) current at 30 ns (a) current at 60 ns (a) 1 2 7.5 4 2 2 4 15 8 4 3 6 22.5 12 6 4 8 30 16 8 i peak 90% 10% iec61000?4?2 w aveform 100% i @ 30 ns i @ 60 ns t p = 0.7 ns to 1 ns figure 9. iec61000?4?2 spec 50 50 cable tvs oscilloscope esd gun figure 10. diagram of esd test setup esd voltage clamping for sensitive circuit elements it is important to limit the voltage that an ic will be exposed to during an esd event to as low a voltage as possible. the esd clamping voltage is the voltage drop across the esd protection diode during an esd event per the iec61000?4?2 waveform. since the iec61000?4?2 was written as a pass/fail spec for larger systems such as cell phones or laptop computers it is not clearly defined in the spec how to specify a clamping voltage at the device level. on semiconductor has developed a way to examine the entire voltage waveform across the esd protection diode over the time domain of an esd pulse in the form of an oscilloscope screenshot, which can be found on the datasheets for all esd protection diodes. for more information on how on semiconductor creates these screenshots and how to interpret them please refer to and8307/d. figure 11. 8 x 20 s pulse waveform 100 90 80 70 60 50 40 30 20 10 0 020406080 t, time ( s) % of peak pulse current t p t r pulse width (t p ) is defined as that point where the peak current decay = 8 s peak value i rsm @ 8 s half value i rsm /2 @ 20 s
ESD7331 www. onsemi.com 5 package dimensions x3dfn2, 0.62x0.32, 0.355p, (0201) case 152af issue a notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. a b e d bottom view b e 2x l2 2x top view 2x a a1 0.05 c 0.05 c c seating plane side view dim min max millimeters a 0.25 0.33 a1 ??? 0.05 b 0.22 0.28 e 0.355 bsc l2 0.17 0.23 mounting footprint* dimensions: millimeters 0.74 1 0.30 0.31 *for additional information on our pb?free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. 2 1 see application note and8398/d for more mounting details a m 0.05 b c a m 0.05 b c 2x 2x recommended pin 1 indicator (optional) d 0.58 0.66 e 0.28 0.36 p ublication ordering information n. american technical support : 800?282?9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81?3?5817?1050 ESD7331/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303?675?2175 or 800?344?3860 toll free usa/canada fax : 303?675?2176 or 800?344?3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc al sales representative on semiconductor and the are registered trademarks of semiconductor components industries, llc (scillc) or its subsidia ries in the united states and/or other countries. scillc owns the rights to a number of pa tents, trademarks, copyrights, trade secret s, and other intellectual property. a listin g of scillc?s product/patent coverage may be accessed at www.onsemi.com/site/pdf/patent?marking.pdf. scillc reserves the right to make changes without further notice to any product s herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any part icular purpose, nor does sci llc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typi cal? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating param eters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the right s of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgic al implant into the body, or other applications intended to s upport or sustain life, or for any other application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer s hall indemnify and hold scillc and its officers , employees, subsidiaries, affiliates, and dist ributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufac ture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner.
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